IC Layout Engineer Resume

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Contact Address: [street] [Country] [City] [State/Province] [Zip Code]

Contact Number: (012)-345-6789

Email Address: [[email protected]]

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Career Objective:

A candidate with a bachelor’s degree in electrical engineering and sound knowledge about working for analog design, IC templates and IO circuits, seeks a challenging role as an IC template engineer in a reputed electrical company.

Summary of Skills:

  • Comprehensive knowledge of designing analog and mixed signal template, IO circuits, and verification tools
  • In-depth knowledge of VLSI Design, standard EDA tools, and RF Analog & Mixed Signal processing techniques
  • Extensive knowledge of designing various templates by using CMOS standard processes
  • Sound knowledge of matching resistors, debugging DRC, and managing template design
  • Familiar with Cadence, GPIO, designing floor plan, and LVDS
  • Excellent communication skills and has the ability to work independently
  • Sound knowledge of basic computer applications and other software applications

Work Experience:

Organization: Electrical Inc, Boston
June 2012 till date
Designation: IC Layout Engineer

  • Handle the tasks of designing custom template of transistor by following the standard procedures of IC template
  • Perform responsibilities of developing design specifications of electrical constraints and electro-migration template
  • Assigned the tasks of guiding junior template designers in designing software IC template
  • Responsible for coordinating with design engineers to ensure that the designed template of electrical chips meets the standard guidelines
  • Handle responsibilities of updating IC design to the senior engineer for verification
  • Responsible for developing custom IC template by utilizing Cadence template tools

Organization: OEM Engineer Group, Boston
April 2010 – May 2012
Designation: Junior IC Layout Engineer

  • Assigned the tasks of assisting senior IC template engineer in generating quality templates following by following the standard methods
  • Handled responsibilities of explaining the logic symbol and the hierarchical structures of the produced design
  • Performed the tasks of developing IC template from scratch as well as verified IC by using CAD tools
  • Assigned responsibilities of troubleshooting template issues to achieve standard IC design
  • Performed the task of developing multi-dimensional templates under the guidelines of senior IC template engineer
  • Handled responsibilities of monitoring semiconductor devices by coordinating with design engineers

Educational Qualification:

Bachelor of Science in Electrical Engineering
Boston University in the year 2009

Reference:

Will be pleased to provide upon request.

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